What is PAM4? Signaling Basics, vs. NRZ, and Testing

Mastering PAM4 Design and Test Methods

PAM4 (quad-level pulse-amplitude modulation) is a modulation technique that uses four different voltage levels to encode two data bits per symbol. Unlike traditional NRZ, which transmits one bit per symbol, PAM4 doubles the data rate with the same bandwidth, making it essential for next-generation high-speed serial standards.

It's not often that you get the opportunity to be a pioneer during your professional career. Since PAM4 design and test methods are still evolving and different labs are taking different approaches, now is the perfect time to become an expert in PAM4.

Tektronix has released the first comprehensive and up-to-date guide to PAM4 application: "PAM4 Signaling in High-Speed ​​Serial Technologies: Testing, Analysis, and Debugging." It explains what PAM4 is, what problems it solves, what challenges it introduces, and what to expect in the future. The authors also promise to keep the document current.

PAM4 Standards for 100G and 400G Ethernet

The 100GBASE-KP4 (100-Gigabit Ethernet) standard is described in IEEE 802.3bj. At 13.6 GBaud (27.2 Gbps), it has not achieved widespread adoption, as the time-tested NRZ protocol is sufficient for such speeds. However, above 50 Gbps, PAM4 is no longer necessary. The new PAM4 application guide is based on the experience of Tektronix engineers working on PAM4 technology and participating in the development of 400G standards, such as 400-Gigabit Ethernet, 56G OIF-CEI, and others.

Why PAM4?

The problem lies in the frequency characteristics of transmission channels. In the past, digital signals could be viewed as constant signals switching between logic high and logic low. However, data rates have increased, requiring high-speed signals to be treated as microwaves propagating through waveguide traces on printed circuit boards. Conductive traces on boards and backplanes are riddled with turns and bends, skin effect, and dispersion; attenuation reaches 70 dB or more at frequencies around 25 GHz. The resulting intersymbol interference (ISI) "closing" the eye patterns.

NRZ signals, which superficially resemble DC, have been managed by conditioning the signal at both the transmitter with FFE (forward-looking equalization) and the receiver with CTLE (continuous-time linear equalization) and DFE (decision-feedback equalization), but the capabilities of these methods are exhausted somewhere between 25 and 50 Gbps.

Comparison of PAM4 and NRZ Signaling

By encoding two bits per symbol, PAM4 transmits twice as much data as PAM2-NRZ at the same symbol rate (i.e., the same baud rate). Note that I use the prefix "PAM2" to denote the familiar NRZ. This is because digital NRZ signals are more accurately described as two-level pulse-amplitude modulation (PAM2) rather than non-return-to-zero.

PAM4 has sixteen distinct bit transitions versus four, six rising/falling edges versus two, and three eye patterns contained within a voltage range and a unit interval versus just one. PAM4 suffers from at least three times the signal-to-noise ratio problems of PAM2-NRZ. A single symbol error can cause two bit errors, especially if jitter is the culprit. To compound these complexities, we now have to consider the weakest link in the chain of three eye patterns: the bit error rate (BER) is determined by the quality of the worst one.

To address PAM4, we leverage our full toolkit: differential signaling, built-in synchronization and clock recovery, and equalization at both the transmitter and receiver. Differential signaling remains unchanged; clock recovery is complicated by less clearly defined edges. Transmitter equalization—both multi-tap FFE and simple de-emphasis—is complicated by the presence of four symbol levels; CTLE receiver equalization remains unchanged, but the DFE now must process four closed-loop decisions.

Three eye patterns also mean three voltage comparators. Early adopters will use common synchronization for the three comparators; future technologies may use independent synchronization. The relative proportions of the three eye patterns create an entirely new category of nonlinearity problems. Currently, engineers in different labs use their own methods for measuring timing and amplitude nonlinearities. As technology matures, new test methods will converge.

PAM4 may create as many problems as it solves, but the standards bodies have given us a significant advantage: by incorporating forward error correction (FEC), the BER requirement has been relaxed by a factor of 100,000. Instead of designing and testing systems with BERs better than 10⁻¹² or 10⁻¹⁵, PAM4-based designs must achieve BERs < 10⁻⁶. Relaxing the BER requirement at the physical layer provides a huge test benefit—and we'll need it.

Testing PAM2-NRZ systems at BERs of 10⁻¹² and below required either running tests that took 20 minutes to an hour or extrapolating faster measurements into the deep noise region. While interpolation is a valid method for estimating the value between two measurements, extrapolation is a leap beyond the measurement's validity. A BER requirement of < 10⁻⁶ allows the full impact of noise and jitter to be assessed in less than a minute using a bit error rate tester (BERT) or an oscilloscope.

PAM4 Test and Debug Guide

The transition from PAM2-NRZ to PAM4 is a fundamental shift in our industry that everyone needs to understand—the sooner the better. Fortunately, the application note "PAM4 Signaling in High-Speed ​​Serial Technologies: Testing, Analysis, and Debug" covers everything in detail. Download your copy today!